NKN/SERVICES/2011

Services

NKN network is designed with the aim of providing:

• Highest level of availability
• Robust & reliable connectivity
• Highest level of Scalability (specifically planned to match the unknown future demands which cannot be envisaged currently)
• Best Bandwidth Capacity: For NKN, various National Long Distance Carriers (NLDs) have provided 1Gbps / 2.5Gbps capacity links which can be self healed. Further, the NLDs are in process of upgrading (using DWDM) to 10Gbps or more connectivity.

The main services of NKN can be broadly categorised under the following heads:

• Generic Services: Internet, Intranet, Network Management Views, e-Mail, Messaging Gateways, Caching Gateways, Domain Name System, Web Hosting, Voice over IP, Multipoint Control Unit (MCU) Services, Video Portals, SMS Gateway, Co- Location Services, Video Streaming etc.
• Community Services: Shared Storage, e-Mail List Software Application (LISTSERV), Authentication Service, EVO, Session Initiation Protocol (SIP), Collaboration Service, Content Delivery Service, International Collaborations with EU-India Grid, Global Ring Network for Advanced Applications Development (GLORIAD) etc.
• Special Services: Virtual Private Network Stitching Services [VPN@L2 (Virtual Private Wire Service / Virtual Private LAN Service), VPN@L3] etc.

FOR MORE DETAILS CLICK;

http://www.nkn.in/services.

NKN Design Overview/2011

NKN Design Overview

The main design consideration for NKN was to create an infrastructure that can scale and adapt to future requirements. NKN design philosophy is to Encourage, Enable, Enrich and Empower the user community to test and implement innovative ideas without any restriction from the network technology and its administration. Based on that philosophy, as a next generation network, NKN will cater to the following requirements:

• Network design - NKN design follows all the current standards to permit seamless inter-operability amongst technologies and seamless integration amongst different original equipment manufacturers.
• Security requirements - With the growing number of incidences reported by CERT and the increasing challenges posed by innovations in convergence, keeping the network alive can be possible only with very stringent security measures designed, implemented and deployed. Any specific requirement for limiting access to services should be deliverable as part of a security policy. The Central Command Control created to react to such situations should address till-date and forecasted attacks.
• Service requirements - These requirements are essential for transparent delivery of services based on either heritage (as in telephony) or the general requirements for a particular service. These requirements might differ between service providers, and possibly even between different tiers of a similar service.
• Network requirements - These requirements are network-specific and can be tied to specific services, specific delivery mechanism (client could be variety of devices like PC/ PDA/ any other device) and access mechanisms like (intranet / Internet). The design will cater to the overall performance goal of the NKN infrastructure.
• Operational requirements - The NKN is designed to cater to the requirements of tracking, troubleshooting, health monitoring, and proactive performance monitoring. With the converged network it becomes more important to proactively monitor the network for impending issues.

FOR MORE DETAILS CLICK;

http://www.nkn.in/designoverview.php

NKN / connected 300 institutions /2011

The target users for the NKN are all institutions engaged in the generation and dissemination of knowledge in various areas, such as research laboratories, universities and other institutions of higher learning, including professional institutions.

NKN has already connected 300 institutions and aims to connect over 1500 Institutions / Organisations / Laboratories under various categories throughout the country.

Following is the list of institutions currently connected:

| First | | Previous | | Next | | Last    ALLAYURVEDICCDACCENTRAL UNIVERSITIESCSIRDAEDBTDEEMED UNIVERSITIESDRDODSTENGINEERING COLLEGEERNETHOMEOPATHICICARICMRIIMIISERIITINSTITUTEISROMEDICALMoESNITNIFTNPTIPOWER MINISTRYRBIRESEARCHSTATE UNIVERSITIESUGCMANAGEMENTOTHERS

• S.No
• Name of Institute

• 1
• IIT, Bhubaneshwar

• 2
• Institute of Physics, Bhubaneswar

• 3
• Indian Institute of Tropical Meteorology, Pune

• 4
• C-DAC, Pune

• 5
• National Centre for Radio Astrophysics,TIFR, Pune

• 6
• ICAR Research Complex, Goa

• 7
• The Inter-University Centre for Astronomy and Astrophysics, Pune

• 8
• National Chemical Laboratory, Pune

• 9
• ICAR Research Complex For Eastern Region,Patna

• 10
• University of Jammu, Jammu

• 11
• Bhabha Atomic Research Centre, Trombay

• 12
• Tata Institute of Fundamental Research, Mumbai

• 13
• IIT, Mumbai

• 14
• C-DAC Mumbai

• 15
• Bhabha Atomic Research Centre, Anushakti Nagar

FOR MORE DETAILS ;

http://www.nkn.in/connectedinstitutes.php

ABOUT NKN/2011

Globally, research and development activities and innovations are increasingly multidisciplinary, collaborative, and require substantial computational power. The key to successful research today demands live consultations, data sharing and resource sharing. Therefore in order to optimally utilise the potential of institutions engaged in generation and dissemination of knowledge in various areas, it is important to connect them through a high speed broadband network. The idea of setting up a National Knowledge Network first emerged through deliberations between the office of Principal Scientific Advisor to the Government of India and the National Knowledge Commission. This was followed by extensive discussions with key stakeholders including experts, potential users, telecom service providers, educational and research institutions, which resulted in the design of the National Knowledge Network.

The NKN comprises of an ultra-high speed CORE (multiples of 10 Gbps), complimented with a distribution layer at appropriate speeds. Participating institutions at the Edge will connect to the National Knowledge Network seamlessly at speeds of 1 Gbps or higher. The network is designed to support Overlay Networks, Dedicated Networks, and Virtual Networks. Advanced applications in areas such as Health, Education, Science & Technology, Grid Computing, Bio informatics, Agriculture, and Governance will be an integral part of NKN. The entire network will seamlessly integrate with the global scientific community at multiple gigabits per second speed.

The purpose of such a knowledge network goes to the very core of the country's quest to build quality institutions with requisite research facilities and create a pool of highly trained persons. The NKN while impacting the existing academic and student community will also alter the R&D landscape for future generations.

FOR MORE DETAILS CLICK;

ABOUT NKN/2011

NIT HAMEER PUR/ VLSI RESOURCES AVAILABLE/TOOLS

         Tools

                       VLSI RESOURCES AVAILABLEhttp://www.nith.ac.in/smdp/tools.html

The Department of E&C Engineering provides several resources for the use of students, staff and faculty. E&CE offers access to electronic equipments, EDA tools and information used in the various courses taught during the course of undergraduate and post-graduate studies. Additionally, E&CD maintains a very popular VLSI Design and Simulation Lab, Computer and Electronic Simulation lab and MEMS Design Centre cum lab for UG & PG students and faculty. The major EDA Tools and software s available are:     

• MEMS-Pro/ TANNER Tools: Perpetual License (5 Users)
• OrCAD: Perpetual License (10 Users)
• MATLAB: Perpetual License (10 Users)

                  

                    EDA Tools/ Hardware/ Software Facilities 

The VLSI Design & Simulation Laboratory established under VLSI Thrust Area Project & SMDP-II Project. It is a fully air conditioned & well furnished with all new modern furniture. The following EDA Tools/ Hardware/ Software Facilities have been received from MC&IT, DIT, Govt. of India under SMDP-II project & the Institute in E&CE Department, NIT Hamirpur HP:

1.  Cadence Tools Bundle: 10 licenses

Full Custom/ Analog/ Mixed Signal/ RF IC Design Flow

Formal Verification

HDL Based Design Flow

DFM

Technology CAD

High Speed PCB Design Flow

DFT/ATPG

2.  Synopsys SoC Tools Bundle: 5 licenses

PrimePower	System Studio filter Design Tools
Pathmill	System Studio ECC Model Library
TetraMAX Iddq Test	Prime Time SI
TetraMAX DSMT Test	NanoSim
TetraMAX ATPG	LEDA Checker
Formality	VCS MX
Pioneer NTB with Vera	System Studio RDK
DC Ultra	DFT Compiler MAX
Design Analyzer	CosmosScope
HDL Compiler Verilog	Astro Rail
Library Compiler	Astro Basic UDSM Place and Route
Module Compiler	Astro XTalk
Power Compiler	Astro, Exdpress Tim. Closure Op
VHDL Compiler	CosmosLE
Physical Compiler Add-on	CosmosSE
Design Ware Library	JupiterXT
Design Ware Developer	Milkyway Environment and Run
System studio	HSPICE
Star-RCXT	Hercules DPMT Add-on
Hercules
Magma Tools Bundle	5 licenses

3. CG-CoreEl for Mentor Tools Bundle 5 licenses

    IC Nanometer Design

Analog and mixed-signal design, full custom IC design, physical 
verification and extraction consisting of:

Eldo

Advance MS

Advance MS RF

Mach IC

IC stations

Calibre Physical Verification

Calibre xRC extraction

Caliber yield analyzer

Calibre OPC Verify

Calibre Mass Data Preperation

Time it

4.  HDL Design Verification and Test

HDL design (VHDL-Verilog-System C simulation, FPGA and ASIC synthesis, design-for-test, formal equivalence checking, hardware-software co-verification, system modeling cabling design) consisting of:

ModelSim simulation and verification

FPGA Advantage

Precision Synthesis

Leonardo Spectrum

Design For Test Tools (DFT insight, DFT Advisor, BSD Architect,  Fastscan, Macro Test)

Seamless Co-verification

Seamless FPGA

System Vision

Logical Cable

Questa

Formal Pro

5.  CoWare tools: 5 licenses

Coware Signal Processing Designer 4.x with Communication Library

Coware  Signal Processing Designer 5-XP with Communication Library

Coware Platform Architect and Model Designer

Coware Processor Designer Generic IP Libraries

6.  NuHorizons for Xilinx software

A number of FPGA prototyping boards.



7. HCL PCs and Peripherals

(a)	3 No. of Opteron-based PCs with 4 GB of main memory, 19" TFT monitor and 64-bit RHEL WS 4.x.
(b)	9 No. of P4-based PCs with 2 GB of main memory, 19" TFT monitor and 64-bit RHEL WS 4.x.
(c)	2 No. of external DVD writer, 1 no. of LJ 1320n, 1 no. of  Cisco 2950-24
(d)	One HP Laser Jet 1320n printer
(e)	Structured cat-6 network cabling

8.	15 KVA (as 2 * 7.5 KVA parallel mode) online UPS with 30 Minutes of battery backup
9.	Cisco 2950-24 Ethernet Switch, 24 ports 10/100 Mbps, Network Manageable (SNMP support)
10.	Tanner EDA Tools & SOFTMEMS EDA Tools: 10 Licences            T-SPICE            L-EDIT            W-EDIT
11.	MEMS EDA Tools            COMSOL Multi Physics (30 Class Kit Lics)            Intellisuite            MEMS+            Coventorware

12.	Xilinx
	Softwares Description	Quantity
	ISE 8.2i	1
	EDK 8.2i	1
	SysGen 8.2	1
	CSP 8.2i	1
	Plan Ahead 8.2i	1
	Hardware Description
	Spartan 3E	15
	Virtex 2 Pro	5
	DIO5	5
	AIO1	5
	Compact flash 512 MB	10
	256 DDR MB RAM	5
	V DEC boards	5

NIT HAMEERPUR/ OBJECTIVES OF SMDP-II PROJECT

 OBJECTIVES OF SMDP-II PROJECT    

Primary Objective - To train special manpower in the area of VLSI Design and related software at M.E./M.Tech level (Type-II manpower). In addition to this, generation of Type-III manpower i.e. M.E./M.Tech in other areas of electronics etc. with at least two courses on VLSI design will also be undertaken.

Secondary Objective - To train Type-IV manpower i.e. B.E./B.Tech in electronics etc. with graduate level courses on VLSI Design. However, the programme will not only be limited to generation of Type-II, III & IV manpower but would endeavour to generate Ph.D in various aspects of VLSI design/microelectronics (Type-I manpower) manpower as well. The establishment of VLSI design laboratories at RCs would also strengthen their academic programme.

                   MAIN COMPONENTS OF SMDP-II

   Establishing the VLSI Design laboratories in all PIs and RC's with the Electronic Design Automation environment drawn by the Working Group. CEERI Pilani would act as the nodal agency for the centralized procurement of all hardware and EDA tools that would be provided to each of the RC and PI in order to get pricing advantage as well as maintaining a uniform standard throughout the country. In addition to the EDA tool environment being provided to all RC's and PIs, RC's would be provided with miscellaneous capital equipment required by the respective institution to take care of its testing and other needs and PIs. The misc. capital equipment procurement would be done by the respective RC's

Training of laboratory engineers and technicians. Hands-on training would be provided on the hardware & EDA tools.

Conducting Instruction Enhancement Programme (IEP) for training of the faculty of 25 PIs by seven Resource Centres. To start with, seven IEP topics would be selected from the list drawn up by the Working Group (Annexure-III). 25 IEP's would be conducted during the entire project duration by 7 RC's. In addition to these, 5 EDA tool administration IEP would be conducted by CEERI Pilani.

Generation of Manpower in VLSI design and related software at:  B.E/B.Tech level (Type IV manpower) - M.E/M.Tech level in the areas of Electronics, Communications, Computer  Science, Instrumentation etc. (Type III manpower) - M.E/M.Tech in VLSI design & Microelectronics (Type II manpower) The Working Group has developed a model curriculum/syllabus, which all the participating institutions would be encouraged to follow. - PhD in various aspects of VLSI design and related software (Type I manpower).

All the participating institutions would be provided with salary grant for 2 temporary faculties during the project period. The RC's would be provided with salary grant for research/project staff. Both RC's and PI's would also be provided with salary grant for a lab engineer. In addition to this, CEERI Pilani would be provided with salary grant for 2 project assistants to monitor lab infrastructure at all the RC's and PI's.

International Guest Faculty: To invite distinguished international guest faculty e.g. from IEEE Circuits & Systems Society (CAS) under its Distinguished Lecture Program (DLP), and others including eminent NRI's to conduct short-term courses at RC's in selected areas of VLSI design.

The Project Implementation Unit at DIT would act as a national repository, facilitation and demonstration center for all EDA tools and designs done at RC's and PI's.

India Chip Programme: Selected VLSI circuit designed at various RC's and PIs would be siliconised either at Semiconductor Complex Ltd. Mohali or through International mechanisms like MOSIS, CMP, EURO Practice etc.

National VLSI Website & Mirror Site: A website at a national center which would be mirrored at all RC's would be created. RCs would provide contents for the National VLSI website. This would house all latest and updated tools including public domain tools, courses and reference designs, which may be developed at any of the RC's and PI's. All the RC's & PI's would be able to download resources from these sites as and when required. CEERI Pilani would host and support a web site especially for EDA tool and hardware configuration/administration and other issues.

In order to encourage the element of research, faculty of PIs as well as students would be provided with financial support to attend national conferences in the area of VLSI design/microelectronic. Students and faculty of RC's and PI's would be supported to attend IEEE conference anywhere in the area of VLSI design provided the students/faculty has an accepted paper for oral lecture presentation.

Book grants and grant for furniture for the VLSI design laboratory would also be provided to all RC's and PIs.

Annual RC/PI Workshop would be organized both at regional and national level in which apart from the overall project review, awards would be provided to best M.Tech projects. ZOPP workshop(s).

Involving coordinators from all RC's, PI's and representative from PIU/DIT would also be organized.

LIST OF 7 RCs AND 25 PIs FOR SMDP-II

IIT Bombay	IIT Madras	IISC Bangalore
NIT Surat	NIT Trichy	NIT Surathkal
SGSIT Indore	NIT Warangal	PSG Technology
NIT Bhopal	NIT Calicut	BEC Shibpur
NIT Nagpur
IIT Dehi	IIT Kanpur	IIT Kharagpur
IIT Guwahati	BHUIT	NIT Silchar
NIT Srinagar	IIT Roorkie	NIT Rourkela
NIT Hamirpur HP	MNIT Allahabad	NIT Jamshedpur
NIT Jalandhar	NIT Durgapur	Jadavpur University
CEERI
NIT Kurukshetra
TIET Patiala
MNIT Jaipur

FOR MORE DETAILS
http://www.nith.ac.in/smdp/about.html